[^ :]+: Assembler messages:
[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.16b,\{ ?v4.8h ?\},v8\[1\]'
[^ :]+:[0-9]+: Info:    did you mean this\?
[^ :]+:[0-9]+: Info:    	luti2 v2.16b, \{v4.16b\}, v8\[1\]
[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8h,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+: Info:    did you mean this\?
[^ :]+:[0-9]+: Info:    	luti2 v2.16b, \{v4.16b\}, v8\[1\]
[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.16b,\{ ?v4.8h ?\},v8\[5\]'
[^ :]+:[0-9]+: Info:    did you mean this\?
[^ :]+:[0-9]+: Info:    	luti4 v2.16b, \{v4.16b\}, v8\[5\]
[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8h,\{ ?v4.16b ?\},v8\[5\]'
[^ :]+:[0-9]+: Info:    did you mean this\?
[^ :]+:[0-9]+: Info:    	luti4 v2.16b, \{v4.16b\}, v8\[5\]
[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti2 v2.16b,v4.16b,v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{ ?x12 ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},x12\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti2 v2.8h,v4.8h,v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{ ?v4.8h ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{ ?x12 ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},x12\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti4 v2.16b,v4.16b,v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{ ?x12 ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},x12\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti4 v2.8h,v4.8h,v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{ ?v4.8h ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.8h,\{ ?x12 ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h ?\},x12\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{ ?v4.8h,x12 ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8b,\{ ?v4.8b ?\},v8\[1\]'
[^ :]+:[0-9]+: Info:    did you mean this\?
[^ :]+:[0-9]+: Info:    	luti2 v2.16b, \{v4.16b\}, v8\[1\]
[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.4h,\{ ?v4.4h ?\},v8\[1\]'
[^ :]+:[0-9]+: Info:    did you mean this\?
[^ :]+:[0-9]+: Info:    	luti2 v2.16b, \{v4.16b\}, v8\[1\]
[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8b,\{ ?v4.8b ?\},v8\[5\]'
[^ :]+:[0-9]+: Info:    did you mean this\?
[^ :]+:[0-9]+: Info:    	luti4 v2.16b, \{v4.16b\}, v8\[5\]
[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.4h,\{ ?v4.4h,v5.4h ?\},v8\[5\]'
[^ :]+:[0-9]+: Info:    did you mean this\?
[^ :]+:[0-9]+: Info:    	luti4 v2.16b, \{v4.16b-v5.16b\}, v8\[5\]
[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 v2.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.16b,\{ ?v4.16b ?\}'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[1\],v16.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[1\],\{ ?v16.16b ?\}'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 v2.8h'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.8h,\{ ?v4.8h ?\}'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[1\],v16.8h'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[1\],\{ ?v16.8h ?\}'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 v2.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.16b,\{ ?v4.16b ?\}'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[1\],v16.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[1\],\{ ?v16.16b ?\}'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 v2.8h'
[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\}'
[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\],v16.8h'
[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\],\{ ?v16.8h ?\}'
[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 v2.16b,\{ ?v4.16t ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 v2.16t,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 2 -- `luti2 v2.8h,\{ ?v4.8m ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 1 -- `luti2 v2.8m,\{ ?v4.8h ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.16b,\{ ?v4.16t ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.16t,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v5.8t ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.8t,\{ ?v4.8h,v5.8h ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.16b,\{ ?v4 ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.16b,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.16b,\{ ?4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.8h,\{ ?v4 ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{ ?v4.8h ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.8h,\{ ?v4.8h ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.8h,\{ ?4.8h ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{ ?v4 ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{ ?4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{ ?v4,v5.16b ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{ ?v4.16b,v5.16b ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{ ?v4.16b,v5.16b ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{ ?v4.16b,5.16b ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.16b,\{ ?v21.16b ?\},v27.16b\[3\]'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.8h,\{ ?v21.8h ?\},v27.8h\[4\]'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.16b,\{ ?v21.16b ?\},v27.16b\[1\]'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.8h,\{ ?v21.8h,v22.8h ?\},v27.8h\[2\]'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.16b\[1\],\{ ?v0.16b ?\},v31.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{ ?v0.16b ?\},v31.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.16b,\{ ?v0.16b\[1\] ?\},v31.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.16b,\{ ?v0\[1\] ?\},v31.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.8h\[1\],\{ ?v0.8h ?\},v31.8h'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{ ?v0.8h ?\},v31.8h'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.8h,\{ ?v0.8h\[1\] ?\},v31.8h'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.8h,\{ ?v0\[1\] ?\},v31.8h'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.16b\[1\],\{ ?v0.16b ?\},v31.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{ ?v0.16b ?\},v31.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.16b,\{ ?v0.16b\[1\] ?\},v31.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.16b,\{ ?v0\[1\] ?\},v31.16b'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.8h\[1\],\{ ?v0.8h,v1.8h ?\},v31.8h'
[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{ ?v0.8h,v1.8h ?\},v31.8h'
[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.8h,\{ ?v0.8h\[1\],v1.8h ?\},v31.8h'
[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.8h,\{ ?v0\[1\],v1.8h ?\},v31.8h'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v8.16b'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v8'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v8.8h'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v8'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v8.16b'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v8'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8.8h'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8'
[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.16b,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{ ?v32.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v32\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[4\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[-1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.8h,\{ ?v4.8h ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{ ?v32.8h ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v32\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[8\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[-1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.16b,\{ ?v4.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{ ?v32.16b ?\},v8\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v32\[1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[2\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[-1\]'
[^ :]+:[0-9]+:  Info: macro invoked from here
[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{ ?v31.8h,v32.8h ?\},v8\[1\]'
[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v32\[1\]'
[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[4\]'
[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[-1\]'
[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v6.8h ?\},v8\[2\]'
[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.16b,\{ ?v21.16b,v22.16b ?\},v27\[2\]'
[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.8h,\{ ?v21.8h,v22.8h ?\},v27\[4\]'
[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 v17.16b,\{ ?v21.16b,v22.16b ?\},v27\[1\]'
[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `luti4 v17.8h,\{ ?v21.8h ?\},v27\[2\]'
